Knowledge of the Computer Organization and Architecture is equally important as the other core subjects because, without knowing the basic functioning of the computer and processor, it is highly impossible to understand other concepts related to the computer systems. One should be able to understand the working of the computer, the basic building blocks of a computer, the processor and the internal things going on.
Poori Padhai has brought to you the Online Test for Computer Organization and Architecture which will focus on the basics of Computer Organization and Architecture. The topics included are Functional units of a computer, BUS structure, Performance, Addressing modes, Memory locations, Memory management, Instructions, Subroutines, Accessing the input and output devices, Direct memory access, Types of ports etc. All these topics will help the individual, to gain basic knowledge about the Computer Organization and the Architecture of Computer, which will be useful in understanding the further topics.
The Online Test will be in multiple-choice question(MCQ) format where the options are given will have a correct option in them. The individual need to read the question carefully, assess the question and go through the options, pick the correct option from them. This is a quite simple format of test which is very helpful. As we have MCQ format, the individual will get to know what the wrong answers are, which is again an important aspect to know.
The COA MCQ test will be available both in English and Hindi where any one of the languages can be chosen to attempt the test. After successful submission, the answers will be displayed along with the explanation of the correct answer. Through this, the correct logic and knowledge behind the question can be identified. The complete result which will have the number of attempted questions, unattempted questions, correct answers etc will also be generated. This will be helpful in self-assessment and also further preparation accordingly.
Functional Units of Computer BUS Structure Performance of System Addressing Modes Memory Locations and Addresses Memory Operations and Management Instructions Sequencing Subroutines and Nesting Accessing Input Output Devices Interrupts Direct Memory Access Bus Arbitration Synchronous Bus Asynchronous Bus Parallel Port Serial Port PCI BUS Basic Operational Concept Instructions and Instruction Sequencing Numbers and Arithmetic Operations Assembly Language Parameter Passing and Stack Frame Standard Input Output Devices Parallel Port Serial Port Exceptions USB Interface Circuits SCSI Bus Static Memories Asynchronous DRAM Synchronous DRAM Large Memories RamBus Memory Readonly Memory Heirarchy Of Memory Caches Mapping Functions Cache Miss Hit Single Bus Organisation Multiple Bus Organisation Hardwired Control Microprogrammed Control Replacement Algorithm Performance Caches Virtual Memory Secondary Storage Fast Adders Multiplication Representation Of Floating Number Pipelining Superscalar Processors CISC and RISC Processors Hazards Of Processor Architecture Clusters VLIW Architecture Address Translation Motorola 680X0 Processor Architecture ARM Architecture Intel IA-32 Pentium Architecture